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arXiv preprint

Pretraining Large Language Models with NVFP4

NVIDIA demonstrates long-horizon pretraining with four-bit matrix operands. Learn the numerical safeguards, retained high-precision state and evaluation limits.

Breakdown by FDE Interviews · 9 min read · Updated

About the original · 2025
AUTHORS
NVIDIA, Abecassis, Agrusa, Ahn, et al.
FROM
NVIDIA
PUBLISHED
Sep 2025 · arXiv preprint
IN THIS BREAKDOWN · 10 SECTIONS

You can read 17% of this breakdown.

01

The paper in one minute

This report demonstrates large-language-model pretraining using NVFP4 for many matrix-multiplication operands. The central result is a twelve-billion-parameter hybrid Mamba-Transformer trained on ten trillion tokens, with learning curves and several downstream scores close to an FP8 baseline.

NVFP4 combines four-bit values with shared scale factors. Its small blocks and two-level scaling improve the representation of local ranges, but the format alone is insufficient for the reported training run. The recipe also preserves sensitive operations in higher precision, transforms weight-gradient inputs, aligns weight quantization across forward and backward passes, and uses stochastic rounding for gradients.

The model's master weights, accumulated weight gradients and optimizer states remain in FP32. Other operations retain BF16 or FP32 paths. “Four-bit pretraining” therefore describes selected arithmetic and tensor representations, not a claim that the whole training process stores or computes everything in four bits.

This page reviews the March 2026 revision of the September 2025 paper. The authors explicitly focus on numerical methodology rather than complete runtime optimization. Transformer Engine's official NVFP4 documentation is the starting point for supported implementation details. Training quality, hardware arithmetic rates and end-to-end training time remain separate measurements.

THE IDEA, VISUALLY
FOUR-BIT OPERANDS DO NOT MEAN FOUR-BIT EVERYTHING Training recipe from section 4; simplified to show which responsibilities remain in higher precision. Master weights and optimizer FP32 retained Quantized GEMM operands FP4 plus block/tensor scales Results and sensitive ops BF16 / FP32 paths Sensitive layers Keep selected paths wider Outliers Transform Wgrad inputs Weight transpose Use shared 2D scaling Gradient rounding Use stochastic rounding Evaluate the trained model separately: the main reported downstream comparison runs in BF16. Algorithm and numerical-quality evidence; hardware peak arithmetic rates are not end-to-end training speedups.
Our map separates low-precision GEMM operands from retained higher-precision weights, optimizer state and sensitive operations. The reported recipe combines several safeguards rather than changing every tensor to four bits.
Research notes: the problem, approach and results
12B / 10T

model parameters / training tokens, section 3

62.62 → 62.58

FP8 → NVFP4 MMLU-Pro, BF16 evaluation, Table 2

59.52 → 56.67

FP8 → NVFP4 code aggregate, BF16 evaluation, Table 2

THE PROBLEM

Four-bit arithmetic promises efficiency, but coarse representation can destabilize long training runs or introduce systematic update errors.

THE IDEA

Combine NVFP4 scaling with selective higher precision, outlier transforms, consistent weight quantization and stochastic gradient rounding.

THE RESULT

A 12B hybrid model trained on 10T tokens approaches an FP8 baseline on many tasks, with some regressions and no universal system-speedup claim.

02

Why it matters to an FDE

An FDE may encounter four-bit claims while selecting hardware, planning model adaptation or comparing deployment costs. Those claims can refer to different things: low-bit inference weights, adapter training on a quantized base, or low-precision arithmetic during full pretraining. The memory and quality implications are not interchangeable.

This paper supplies a concrete example of why numerical details matter. A coarse quantizer can erase small updates, outliers can distort a block's scale, and different row-wise and column-wise representations can make the backward computation inconsistent with the forward weights.

Use quantization to separate representation choices from algorithmic behavior. Before accepting a cost claim, ask which tensors change precision, which states remain wide, what hardware supports the path and how the final model was evaluated. A lower operand bit count alone does not establish a proportional reduction in the full training budget.

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  • ◇1 architecture diagram
  • </>2 runnable code blocks
  • ▦3 results tables
  1. 03Key takeaways

    Six numerical and operational distinctions behind the NVFP4 training result

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  2. 04How it works

    Follow scaling, numerical safeguards and the precision retained around FP4 GEMMs

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  3. 05The numbers that matter

    Compare task scores and training configurations without generalizing hardware peak rates

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  4. 06Try it yourself

    Verify stochastic-rounding expectation and a transform's exact-arithmetic invariants

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  5. 07Where it breaks

    Recognize scale errors, sensitive layers and the limits of architecture-specific evidence

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  6. 08Using it on a deployment

    Turn a low-precision proposal into a controlled quality and resource experiment

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  7. 09Interview angles

    Explain why four-bit training needs more than casting tensors to a smaller dtype

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