01Explain how the CUDA execution model maps to hardware, grids, blocks, warps, SMs.▼easyNVIDIAGoogleCoreWeave3 repliesunlockedThe NVIDIA warm-up that exposes whether you've written a kernel or just called .cuda(). The mapping from software hierarchy to silicon explains every GPU performance conversation that follows.Open full answer →
02Walk me through the GPU memory hierarchy, registers, shared memory, L2, HBM. What lives where and why?▼easyNVIDIAxAIMeta1 repliesunlockedKernel optimization is mostly the art of feeding 100+ TFLOPs from the small fast end of this hierarchy. Know the rough latencies and bandwidths, interviewers listen for the numbers.Open full answer →
03What is warp divergence and why does it hurt performance?▼easyNVIDIAxAI1 repliesunlockedA staple NVIDIA screen with a precise mechanical answer, and a follow-up trap about which branches actually diverge that catches most candidates.Open full answer →
06How do you determine whether a kernel is memory-bound or compute-bound?▼mediumNVIDIAGoogleTogether AI3 repliesunlockedThe roofline model in one ratio: FLOPs per byte against the hardware's ridge point. Get the H100 arithmetic right and you can classify any kernel, including why LLM decode will never be compute-bound at batch 1.Open full answer →
